A16 - ASCI Spring School on Heterogenenous Computing Systems

From: May 29 to June 1, 2017 Registration is Open

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ASCI Spring School on

Heterogenenous Computing Systems

29 May – 1 June 2017

Location: Kontact der Kontinenten, Soest




In designing computing systems performance was always one of the main drivers. High performance can be achieved by exploiting parallelism, at all levels, from operation and data level to task level. Today almost all systems exploit multiple types of parallelism. In addition, to reduce cost and improve efficiency more dedicated hardware can be included, ranging from graphic units (e.g. GPUs which are now more general purpose and programmable), digital signal processors and VLIWs (Very Long Instruction Word processor), FPGA (Field Programmable Gate Array) hardware, to full custom accelerators. This leads to highly parallel heterogeneous systems.


More recently power consumption becomes an extra constraint and additionally drives the design. The good news is that low energy also favors using heterogeneous systems. As a consequence all of today's processing systems, which require reasonable or high performance, are largely heterogenous.  These systems are more difficult to design, to program, and to reason about. This motivated us to organize a spring school on heterogeneous computing systems.


This school will address various topics, including:

- overview of heterogenous computing

- reconfigurable systems

- programming models and code generation for heterogeneous systems

- partitioning and mapping code to heterogeneous systems

- design of accelerators

- modeling heterogeneous systems for energy and time

- using models for design space exploration

- beyond heterogeneous processing architectures: a glimpse in the future

Above topics will be treated by experts from the Netherlands and abroad.


Students can get 5 ECTS credits for this course. To get these credits they have to complete a lab related to one or more of the treated topics. We will provide several interesting and challenging lab options, including developing a CGRA (Coarse Grain Reconfigurable Array), efficient programming a heterogeneous GPU based platform, and design-space exploration on a dynamic VLIW processor.


Required background: for this course students need good programming skils, and reasonable knowledge on computer architecture (like an introduction course in microprocessors or computer architectures).



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